Not Applicable
The present invention relates generally to the field of conductive polymer positive temperature coefficient (PTC) devices. More specifically, it relates to conductive polymer PTC devices that are of laminar construction, and that are especially configured for surface-mount installations.
Electronic devices that include an element made from a conductive polymer have become increasingly popular, being used in a variety of applications. They have achieved widespread usage, for example, in overcurrent protection and self-regulating heater applications, in which a polymeric material having a positive temperature coefficient of resistance is employed. Examples of positive temperature coefficient (PTC) polymeric materials, and of devices incorporating such materials, are disclosed in the following U.S. patents:
U.S. Pat. No. 3,823,217xe2x80x94Kampe
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U.S. Pat. No. 4,426,633xe2x80x94Taylor
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One common type of construction for conductive polymer PTC devices is that which may be described as a laminated structure. Laminated conductive polymer PTC devices typically comprise a single layer of conductive polymer material sandwiched between a pair of metallic electrodes, the latter preferably being a highly-conductive, thin metal foil. See, for example, U.S. Pat. Nos. 4,426,633xe2x80x94Taylor; 5,089,801xe2x80x94Chan et al.; 4,937,551xe2x80x94Plasko; 4,787,135xe2x80x94Nagahori; 5,669,607xe2x80x94McGuire et al.; and 5,802,709xe2x80x94Hogge et al.; and International Publication Nos. WO97/06660 and WO98/12715.
In meeting a demand for higher component density on circuit boards, the trend in the industry has been toward increasing use of surface mount components as a space-saving measure. In accordance with this trend, laminated conductive polymer PTC devices have increasingly been designed and constructed as surface-mount devices (SMD""s). Typically, an SMD is manufactured with a pair of opposed terminals that include a solder overcoat layer. See, e.g., U.S. Pat. No. 6,172,591, the disclosure of which is incorporated herein by reference. The device is attached to a printed circuit (PC) board by reflow soldering, whereby the solder layer on the terminals is melted when the device is brought into contact with solder-coated contact pads on the PC board. One problem with the reflow soldering process is that of so-called xe2x80x9ctombstoning.xe2x80x9d This effect occurs when thermal stresses experienced by the device during the reflow soldering process (due to different coefficients of thermal expansion between the foil electrodes and the layer of polymer PTC material laminated between them) cause the device to tip out of the horizontal plane. The tombstoning effect may be exacerbated when the solder melting on the terminals does not occur simultaneously, with the result that the terminal at which the solder melts more slowly is elevated with respect to the other terminal. The ultimate result of the tombstoning effect may be a solder joint that is physically and/or electrically degraded.
At present, the only practical way to address the above-described problem is by post-manufacture inspection and testing, which results in reduced yields due to rejection of PC boards with xe2x80x9ctombstonedxe2x80x9d devices. Furthermore, there is the possibility that some defective PC boards will escape detection, with the attendant risk that a defective board will fail after installation in a piece of electronic equipment. Accordingly, there has been a long-felt, but as yet unsatisfied need to reduce the incidence of tombstoning during the reflow soldering process.
Broadly, the present invention is a surface mount conductive polymer PTC device, comprising a layer of conductive polymer PTC material laminated between first and second metal foil electrodes to form a laminated structure, wherein a thermal stress relief area is formed in each of the electrodes. In a specific preferred embodiment, each of the thermal stress relief areas is formed as an etched-out area in one of the electrodes. The etched-out areas are equal in surface area, and they are symmetrically disposed on the two electrodes, so that the two electrodes are themselves symmetrical, and are subject to equal degrees of thermal stress relief. First and second opposed end terminals are formed on the opposed ends of the laminated structure to providing electrical connection to the first and second electrodes, respectively.
The external surfaces of the first and second electrodes are fully-metallized, except for the stress relief areas, so as to provide a large surface area for the adhesion of the upper and lower ends of the first and second terminals to the first and second electrodes, respectively. An external insulation layer applied over the metallized external electrode surfaces between the ends of the first and second terminals to provide electrical isolation between the first and second terminals, wherein the external insulation layer is flush with the upper and lower ends of the terminals. The external insulation layer also fills in the etched-out stress relief areas.
The etched-out stress relief areas in both of the electrodes provide balanced compensation for the thermal stresses induced by the unequal expansion of the polymer layer and the foil electrode layers during the reflow soldering process. Thus, the probability and the degree of thermal stress-induced tipping of the device will be reduced. Furthermore, because the tipping of the device due to thermal stresses may, in fact, contribute to the unequal melting of the solder at the terminals, the thermal stress relief provided by the etched out areas will substantially reduce, if not eliminate, the problem of tombstoning.
In another aspect, the present invention is a method of fabricating the above-described device. Broadly, such a method would comprise the steps of: (1) providing a laminated structure comprising a conductive polymer PTC layer sandwiched between first and second metal layers; (2) isolating selected areas of the first and second metal layers to form, respectively, first and second arrays of metal strips; (3) forming a plurality of thermal stress relief areas in each of the metal strips in the first and second arrays; (4) forming a first plurality of insulation areas on the exterior surface of each of the first array of metal strips and a second plurality of insulation areas on the exterior surface of each of the second array of metal strips; (5) forming a plurality of first terminals, each electrically connected to one of the metal strips in the first array, and a plurality of corresponding second terminals, each electrically connected to one of the metal strips in the second array, each of the first terminals being isolated from a corresponding second terminal by one of the first plurality of insulation areas and one of the second plurality of insulation areas; and (6) separating the laminated structure into a plurality of devices, each comprising a conductive polymer layer sandwiched between a first electrode formed from one of the metal strips in the first array and a second electrode formed from one of the metal strips in the second array; a first terminal in electrical contact only with the first electrode; and a second terminal in electrical contact only with the second electrode.
More specifically, the step of isolating selected areas of the first and second metal layers comprises the steps of: (2)(a) forming a series of substantially parallel linear slots through the laminated structure; (2)(b) plating the internal side walls of the slots and the exterior surfaces of the first and second metal layers with a conductive metal plating layer; and (2)(c) etching a series of substantially linear isolation gaps in each of the first and second metal layers, including the metal plating layer applied thereto.
Thus, in a specific preferred embodiment, the method comprises the steps of: (1) providing a laminated structure comprising a conductive polymer PTC layer sandwiched between first and second metal foil layers; (2) forming a series of parallel linear slots through the laminated structure; (3) plating the side walls of the slots and the exterior surfaces of the first and second metal layers with a conductive metal plating; (4) isolating selected areas of the plated first and second metal foil layers to form, respectively, first and second arrays of electrode strips; (5) forming a pattern of thermal stress relief areas in each of the electrode strips in the first and second electrode strip arrays; (6) forming a plurality of insulation areas on the exterior surface of each of the electrode strips in the first and second electrode strip arrays; (7) forming a plurality of first terminals, each in contact with one of the electrode strips in the first electrode strip array, and a plurality of second terminals, each in contact with one of the electrode strips in the second electrode strip array, wherein each of the first terminals is separated from a second terminal by one of the insulation areas on each of the first and second electrode strip arrays; and (8) separating or singulating the laminated structure into a plurality of devices, each comprising a conductive polymer PTC layer sandwiched between a first electrode formed from one of the first array of electrode strips and a second electrode formed from one of the second array of electrode strips, a thermal stress relief area in each of the first and second electrodes, and first and second terminals respectively contacting the first and second electrodes.
In accordance with this specific preferred embodiment, the step of isolating selected areas of the plated first and second metal layers includes the step of etching a first series of parallel, linear isolation gaps in the plated first metal layer, and a second series of parallel, linear isolation gaps in the second plated metal layer, to form first and second arrays, respectively, of parallel electrode strips. The isolation gaps in the first and second metal layers are staggered so that the electrode strips in the first array are staggered with respect to those in the second array, wherein the each of the isolation gaps in the first metal layer is adjacent one of a first set of slots, and the each of the isolation gaps in the second metal layer is adjacent one of a second set of slots that alternate with the first set. Thus, each electrode strip in the first electrode strip array comprises a first linear array of electrodes formed in the first metal layer, each defined between one of the slots in the first set of slots and one of the isolation gaps in the first series of isolation gaps, while each electrode strip in the second electrode strip array comprises a second linear array of electrodes in the second metal layer, each defined between one of the slots in the second set of slots and one of the isolation gaps in the second series of isolation gaps, wherein the electrodes in the first linear electrode array are on the opposite sides of the slots from the electrodes in the second linear electrode array. Furthermore, because of the asymmetric spacing of the isolation gaps between successive slots, each isolation gap separates one of the linear electrode arrays from a narrow metal band, and each slot has a narrow metal band on one side and a linear electrode array on the other side.
The step of forming a pattern of thermal stress relief areas is performed by etching a linear pattern of defined etched-out areas in each of the electrode strips in the first and second arrays of electrode strips. The etching is done through the plating and the metal foil, down to the polymer layer. Each of the etched-out areas in the electrode strips of the first electrode strip array is aligned with an isolation gap in the in the second plated metal layer, and each of the etched-out areas in the electrode strips in the second electrode strip array is aligned with an isolation gap in the first plated metal layer.
The step of forming a plurality of insulation areas comprises the step of screen printing a layer of insulation material on both of the external surfaces of the laminated structure, along each of the electrode strips. The insulation layers are applied so that the isolation gaps and the thermal stress relief areas are filled with insulation material, but a substantial portion of each of the electrode strips along each of the slots is left uncovered or exposed. The narrow metal bands are also left uncovered.
The step of forming the first and second terminals comprises the step of overlaying a solder plating over the metal-plated surfaces that are not covered by the insulation layer. The solder plating is thus applied to the interior wall surfaces of the slots, the narrow external metal bands, and the exposed portions of the electrode strips.
The final step of the fabrication process comprises the step of singulating the laminated structure into a plurality of individual conductive polymer PTC devices, each of which has the structure described above. Specifically, the electrode strips in the first and second plated metal layers are formed, by the singulation step, respectively into first and second pluralities of external electrodes.
While a device having a single conductive polymer PTC layer is described herein, it will be appreciated that a device having two or more such layers can be constructed in accordance with the present invention.
The above-mentioned advantages of the present invention, as well as others, will be more readily appreciated from the detailed description that follows.